Conventionally, power control devices that perform PWM (pulse width modulation) control of electric power supplied to an electric load such as a light emitting element have widely been used. The configuration etc. of such power control devices will be described briefly below, taking as an example an LED control device that controls electric power supplied to an LED (light-emitting diode).
FIG. 6 is a configuration diagram of the LED control device. As shown there, the LED control device 100 includes a PWM signal generation circuit 102, an LED drive circuit 103, a power supply circuit 104, etc.
The PWM signal generation circuit 102 receives a lighting control voltage from outside. The lighting control voltage is a voltage that represents the desired emission luminance (the voltage value correlates with the emission luminance), and is, for example, generated in an external device according to an instruction from the user. That is, the lighting control voltage is an analog voltage signal that represents the desired emission luminance.
The PWM signal generation circuit 102 generates, based on the received lighting control voltage, a PWM signal (pulse signal) that is going to be used in the PWM control of the electric power supplied to an LED (the electric current passed through the LED). In the PWM signal, H level represents an on state and L level represents an off state.
The LED drive circuit 103 continuously receives the PWM signal, and drives the LED 200 as a drive target according to the PWM signal. That is, by using the electric power supplied from the power supply circuit 104, the LED drive circuit 103 so operates that, in the on period (in the period when the PWM signal is on), a predetermined amount of current passes through the LED 200 and, in the off period (in the period when the PWM signal is off), no current passes through the LED 200.
More specifically, the PWM signal generation circuit 102 includes an A/D conversion circuit 121, a duty factor updating circuit 122, and a clock generation circuit 123.
The A/D conversion circuit 121 has an input line across which it continuously receives the lighting control voltage. The A/D conversion circuit 121 repeats sampling on the received lighting control voltage and thereby generates a digital signal (a signal that represents the value of the lighting control voltage as detected at each occasion of sampling).
The sampling is performed synchronously with a sampling clock signal received from the clock generation circuit 123. The A/D conversion circuit 121 has a grounded point (for example, a ground pattern), so that the potential difference between the input line and the grounded point is detected as the value of the lighting control voltage. That is, the value of the lighting control voltage is detected relative to the ground potential as a reference.
The duty factor updating circuit 122 has duty factor reference information set in it which represents the duty factor of the PWM signal, and updates the duty factor reference information according to the signal representing the value of the lighting control voltage received from the A/D conversion circuit 121. The duty factor reference information is updated repeatedly according to the successively received value of the lighting control voltage so as to reflect the newest value of the lighting control voltage.
More specifically, the duty factor updating circuit 122 has a duty factor updating period set in it (which is here assumed to correspond to five pulses of the sampling clock signal). Every duty factor updating period, the average value of the lighting control voltage sampled during that period is calculated, and the set duty factor reference information is updated with a value commensurate with (obtained by multiplying by a certain coefficient) the calculated value.
The duty factor updating circuit 122 generates a PWM signal according to the currently set duty factor reference information, and feeds it to the succeeding stage. More specifically, the PWM signal is generated such that the duty factor in each PWM period is equal to the duty factor as it is set at the start of that PWM period. In this way, in the generation of the PWM signal, every PWM period, the most recent duty factor reference information is reflected. The clock generation circuit 123 generates the sampling clock signal, and feeds it to the A/D conversion circuit 121.
FIG. 7 is a timing chart in illustration of the operation of the PWM signal generation circuit 102. Shown in FIG. 7 are the states (waveforms) of, from top down, the “sampling clock signal,” the “lighting control voltage,” the “updating of the duty factor reference information” (arrows indicating the timing of the updating), and the “PWM signal.” Here, the lighting control voltage is assumed to have an ideal waveform (under no influence of noise).
As shown in FIG. 7, every duty factor updating period, the set duty factor reference information is updated according to the result of the detection of the lighting control voltage. In FIG. 7, D1 to D5 indicate the updated duty factor reference information. Every PWM period, the currently set duty factor reference information is referred to, and according to this duty factor reference information, the PWM signal is generated.
Operating in this way, the PWM signal generation circuit 102 generates the PWM signal according to the received lighting control voltage. For example, as shown in FIG. 7, when the lighting control voltage falls from Ea to Eb, in response, the PWM signal is so generated as to have a lower duty factor. With the LED control device 100, it is possible to perform PWM control of the electric power supplied to the LED 200 according to the received lighting control voltage.